`ifdef inside a define macro

i want a define to work depending on some input so i tried the following
`define def_a (input1,out)\
`ifdef COMMAND \
out= input1*3 \
`endif

Its properly compiling and the tc is going through fine.

some time back i read a post regarding #ifdef inside a #define in Cpp link for which is :
http://bytes.com/topic/c/answers/472611-possible-write-such-macro

where they mentioned
- Preprocessing directives can only span one line (the \ may hide
that but the above is only one source line) and there may be only
one preprocessing directive per line.
- Preprocessing directives start the respective line (but for
whitespace)
- Thus, you cannot generate preprocessing directives using
preprocessing directives; the language does not allow it.

I wanted to test above thing and tried similar thing in SV and to my surprise there are no issues and you can write `ifdef/`ifndef in a `define.

But one thing to make sure is no space after "\" in each line. if spaces are there it gives compilation error

Error:
not found match for `endif

So u can write such macros in SV.:)